Advanced packaging is everything that happens after silicon is made to turn it into a usable chip package. Old-school packaging just connected one die to a substrate with wires. Simple. Done. Advanced packaging lets you combine multiple dies (chiplets) plus [[HBM]] memory into one module with very dense connections. Technologies include 2.5D/3D stacking, hybrid bonding, through-silicon vias (TSVs), and fan-out wafer-level packaging. [[CoWoS and 2.5D Packaging]] from TSMC is the current poster child for AI GPU packaging. It enables the bandwidth and density needed for modern accelerators. The shift matters because [[Moore's Law]] is harder. You can't shrink transistors as easily anymore. So performance gains now come from stitching together multiple specialized dies and stacking memory right next to compute. Links: [[Advanced Packaging MOC]], [[Chiplets and Heterogeneous Integration]], [[Why Advanced Packaging Matters Now]] --- #semiconductors #deeptech